High efficiency and low harmonic distortion Class E RF Power

In recent years , with the rapid development of wireless communication , wireless communication in the central part - wireless transceiver increasingly demanding lower power consumption, higher efficiency and smaller size , but as transceivers the last stage , the power consumed by the power amplifier in the transceiver has accounted for 60 % to 90% , seriously affecting the performance of the system . Therefore, the design of an efficient and low harmonic distortion power amplifier transceiver for improving efficiency , reducing power losses and improve system performance has great significance .

The author uses a SiGe

BiCMOS process to achieve the integration of Class E power amplifier , the operating frequency of 1.8GHz, operating voltage of 1.5V, the output power of 26dBm, and with high efficiency and low harmonic distortion , suitable for FM / FSK constant envelope modulation , etc. the power of the amplified signal . In order to achieve the design goal, the power amplifier uses a special method , including the use of two enlarged structure, differential and complementary cross-coupled feedback structure.

Class E amplifier is characterized by the transistor as switch, compared to conventional transistor as a current source of A, B, AB class amplifier with higher power added efficiency (PAE, power added efficiency).

Figure ideal class E power amplifier schematics 1. Where , C is the junction capacitance and the external FET capacitance and , ron for the FET drain-source resistance in the linear region when .

When the input voltage is greater than the threshold voltage of the FET in the linear region , the equivalent of the switch is closed , due to the drain-source resistance between ron small, so VD is approximately zero ; whereas when the input voltage is less than the threshold voltage of the FET is turned off, equivalent to switching off , ID is 0. In this case , C charging, causing VD increases, the tuning network VD filtered from the fundamental wave is transmitted to the load resistor. When the switch is closed again , with VD = 0 and dVD / dt = 0, so that the FET on voltage and current do not occur simultaneously , eliminating the charge and discharge brings (1/2) CV2 loss , ideal transistor efficiency of 100 %.

In addition to high efficiency , E class A further advantage is that the power amplifier can be adjusted , ie at the same time to ensure that the output efficiency of a wide range of adjustable output power . Because the switch FET equivalent , the amplitude of the input voltage does not affect the output power of the size . Similarly , the effect of tube spot in the triode region , there will be power consumption between the drain-source resistance ron PLOSS, which is the main power loss Class E amplifier . Since PLOSS and VD2 proportional , we can drain efficiency is expressed as :

Wherein , C is a constant . Thus, by adjusting the output power to guarantee a certain voltage , E class amplifier can maintain a high efficiency.

Problems high efficiency and low harmonic distortion Class E RF power amplifier design

Class E amplifier also has a lot of limitations. For example, because VD than VDD take on about three times , so when the design must take into account the impact of the breakdown voltage , which makes the output power range have significant limitations. Furthermore, in order to reduce the loss caused ron be longer than the width as large as possible , but the larger the area of ​​the transistor , the gate capacitance will result in larger , so that the input inductance of the need for a smaller coupling this would raise the input signal higher demand , it is difficult to achieve precise through BiCMOS process . And a large gate-drain capacitance will cause output to the input of the strong feedback , which leads to coupling between input and output . Finally , single-ended output circuit for each cycle of the silicon substrate to be circumferentially or a large current discharge , which may cause the frequency of the substrate and coupled to the input current , the output signal of the same frequency , so that the error generated at the output signal.

Circuit Design and Improvement

Figure 2 shows a two-stage differential amplifier structure , wherein M5, M8 Structure of the first differential amplifier , the second stage is responsible for providing a high driving voltage of the power amplifier ; M1 and M2 constituting the second stage differential amplifier , the M6, M7 and M3, M4 , respectively, constitute one or two cross -coupled positive feedback structure.

Fully differential structure shown in Figure 2 can address the impact of substrate coupling . Since the differential structure , the double -ended output twice each cycle will Gravitropism discharge current, thereby becoming twice the frequency coupling current signal current , which eliminates the substrate coupling interference signals. Under In addition, in the same supply voltage , while providing the same output power , the current flowing through the structure of a fully differential single-ended output is much smaller than that of each switch , it does not increase the switching losses in the premise , you can use the size smaller transistors , thereby reducing the input signal requirements.

LC oscillator

In order to reduce losses caused by ron , and increase the switching speed, M1 and M2 are usually longer than the width will be done relatively large , so that will be on the input signals have higher requirements .

Using the power amplifier shown in Figure 2 the mode-locking technique that LC oscillator structure, not only further reduce the size of the switch , and to speed up the conversion rate of the switch. The M3, M4 constituting the oscillator in the cross- coupling portion provided to compensate for the negative resistance inductors L1, L2 loss caused by the input switch and the introduction of a positive feedback . So that when the LC oscillator operating at the power amplifier input frequency , because its output at the drain of M1 and M2 , will help the input switch is completed in the shortest possible time "on" and "off" state changes, which can further reduce the size of the input switch . By adjusting the LC oscillator parameters , making the output side to the input frequency oscillation , thus speeding up the opening and closing speed of the switch , the switch to achieve the purpose of reducing the width to length ratio.

Furthermore, with respect to the single output port of the amplifier structure , the cross-coupled amplifier configuration shown in Figure 2 , in practice result in lower total harmonic distortion (THD). Because the use of a fully differential structure , the output port will greatly weaken the even harmonics , so the output harmonics in odd harmonics dominate .